1. Field of the Invention
The present invention relates to a differential input circuit to be utilized for example in an operational amplifier or a differential amplifier.
2. Description of the Background Art
A differential input circuit for inputting the differential input signals has conventionally been realized in a form of a differential pair using field effect transistors (FET) or bipolar transistors. Such a conventionally known differential input circuit configuration has been associated, however, with a limited common mode input voltage range for the differential input signals, because of the gate-source voltage V.sub.gs of the FETs used in the differential pair or the base-emitter voltage V.sub.be of the bipolar transistors used in the differential pair.
In order to improve this situation, there has been a proposition for widening the common mode input voltage range for the differential input signals by taking a current sum of outputs of two differential pairs of complementary conductivity types, as discussed in "A Rail-to-Rail Input/output CMOS Power Amplifier", IEEE Journal of Solid State Circuits, Vol. 25, No. 2, pp. 501-504, April 1990. (See FIG. 1 of this reference in particular.)
However, according to this proposition, the directions of the output currents of two differential pairs of complementary conductivity types are opposite to each other, so that it is indispensable in this configuration to have a current summing circuit for summing two oppositely directed output currents. For this reason, it is unavoidable in this configuration to have additional circuit components, and consequently it is inevitable for this configuration to have a large circuit size and to be more expensive.
Moreover, this configuration has been associated with a problem that a sum of the output currents obtained from the differential pair varies depending on the common mode input voltage level, because of the matching error in the current sources of the differential pair and the error in the current summing circuit, which may be occuring at the common mode input voltage level at which one of the differential pair is hardly operating and the other one of the differential pair is operating predominantly, or at the common mode input voltage level at which both of the differential pair are operating simultaneously. As a consequence, when this configuration is utilized in the differential amplifier circuit having resistor loads, the variations in the output levels is produced so that the stable operation is not obtainable.